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L6598
HIGH VOLTAGE RESONANT CONTROLLER
s s s
s s s s s s s s s
HIGH VOLTAGE RAIL UP TO 600V dV/dt IMMUNITY 50V/ns IN FULL TEMPERATURE RANGE DRIVER CURRENT CAPABILITY: 250mA SOURCE 450mA SINK SWITCHING TIMES 80/40ns RISE/FALL WITH 1nF LOAD CMOS SHUT DOWN INPUT UNDER VOLTAGE LOCK OUT SOFT START FREQUENCY SHIFTING TIMING SENSE OP AMP FOR CLOSED LOOP CONTROL OR PROTECTION FEATURES HIGH ACCURACY CURRENT CONTROLLED OSCILLATOR INTEGRATED BOOTSTRAP DIODE CLAMPING ON Vs SO16, DIP16 PACKAGES
DIP16
SO16N
ORDERING NUMBERS: L6598 L6598D
DESCRIPTION
The L6598 is manufactured with the BCD OFF LINE
technology, able to ensure voltage ratings up to 600V, making it perfectly suited for AC/DC Adapters and wherever a Resonant Topology can be beneficial. The device is intended to drive two Power MOS, in the classical Half Bridge Topology. A dedicated Timing Section allows the designer to set Soft Start Time, Soft Start and Minimum Frequency. An Error Amplifier, together with the two Enable inputs, are made available. In addition, the integrated Bootstrap Diode and the Zener Clamping on low voltage supply, reduces to a minimum the external parts needed in the applications.
BLOCK DIAGRAM
VS 5 6 7 OP AMP 12 + UV DETECTION BOOTSTRAP DRIVER HVG DRIVER 16 V BOOT HVG H.V.
OPOUT OPINOPIN+
15 14
CBOOT LOAD
OUT Ifmin V REF DEAD TIME 4 Rfmin LVG DRIVER Ifstart V REF + 2 Rfstart CONTROL LOGIC Iss 3 Cf VCO 1 Css
D98IN887A
DRIVING LOGIC
LEVEL SHIFTER
Vs 11 10 GND 8 LVG
Vthe1
+ Vthe2
EN1
9
EN2
February 2000
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L6598
PIN CONNECTION
Css Rfstart Cf Rfmin OPOUT OPINOPIN+ EN1
1 2 3 4 5 6 7 8
D98IN888
16 15 14 13 12 11 10 9
VBOOT HVG OUT N.C. VS LVG GND EN2
THERMAL DATA
Symbol Rth j-amb Parameter Thermal Resistance Junction to Ambient SO16N 120 DIP16 80 Unit C/W
PIN FUNCTION
N. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Name C SS R fstart Cf R fmin OPout OPonOPon+ EN1 EN2 GND LVG Vs N.C. OUT HVG Vboot Soft Start Timing Capacitor Soft Start Frequency Setting - Low Impedance Voltage Source - See also Cf Oscillator Frequency Setting - see also Rfmin, Rfstart Minimum Oscillation Frequency Setting - Low Impedance Voltage Source - See also Cf Sense OP AMP Output - Low Impedance Sense Op Amp Inverting Input - High Impedance Sense Op Amp Non Inverting Input - High Impedance Half Bridge Latched Enable Half Bridge Unlatched Enable Ground Low Side Driver Output Supply Volatge with Internal Zener Clamp Not Connected High Side Driver Reference High Side Driver Output Bootstrapped Supply Voltage Function
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L6598
ABSOLUTE MAXIMUM RATINGS
Symbol IS V LVG VOUT V HVG VBOOT dV BOOT/dt dVOUT/dt Vir V ic Supply Current at Vcl (*) Low Side Output High Side Reference High Side Output Floating Supply Voltage VBOOT pin Slew Rate (repetitive) OUT pin Slew Rate (repetitive) Forced Input Voltage (pins Rfmin, Rfstart) Forced Input Volatge (pins Css, Cf) Parameter Value 25 14.6 -1 to VBOOT -18 -1 to VBOOT 618 50 50 -0.3 to 5 -0.3 to 5 -0.3 to 5 3 -0.3 to 5 -5 to 5 4.6 -40 to +150 -40 to +150 -40 to +125 Unit mA V V V V V/ns V/ns V V V mA V V V C C C
V EN1, VEN2 Enable Input Voltage IEN1, IEN2 Vopc Vopd Vopo Tstg Tj Tamb Enable Input Current Sense Op Amp Common Mode Range Sense Op Amp Differential Mode Range Sense Op Amp Output Voltage (forced) Storage Temperature Junction Temperature Ambient Temperature
(*) The device is provided of an internal Clamping Zener between GND and the Vs pin, It must not be supplied by a low impedance voltage source. Note : ESD immunity for pins 14, 15 and 16 is guaranteed up to 900 (Human Body Model).
RECOMMENDED OPERATING CONDITIONS
Symbol VS Vout (*) Vboot (*) fmax Supply Voltage High Side Reference Floating Supply Rail Maximum Switching Frequency Parameter Value 10 to Vcl -1 to Vboot-Vcl 500 400 Unit V V V kHz
(*) If the condition Vboot - Vout < 18 is guaranteed, Vout can range from -3 to 580V.
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L6598
ELECTRICAL CHARACTERISTCS (VS = 12V; VBOOT - VOUT = 12V; Tamb = 25C)
Symbol Pin Parameter Test Condition Min. Typ. Max. Unit
SUPPLY VOLTAGE Vsuvp Vsuvn Vsuvh Vcl Isu Iq 12 VS Turn On Threshold VS Turn Off Threshold Supply Voltage Under Voltage hysteresis Supply Voltage Clamping Start Up Current Quiescent Current, fout = 60kHz, no load Vs < Vsuvn Vs > Vsuvp 2 14.6 10 7.3 10.7 8 2.7 15.6 16.6 250 11.4 8.7 V V V V A mA
HIGH VOLTAGE SECTION Ibootleak Ioutleak Rdon 16 14 16 BOOT pin Leakage Current OUT pin Leakage Current Bootstrap Driver On Resistance VBOOT = 580V VOUT = 562V 150 5 5 mA mA
HIGH/LOW SIDE DRIVERS Ihvgso Ihvgsi Ilvgso Ilvgsi trise tfall OSCILL ATOR DC fmin fstart V ref td 2, 4 14 14 Output Duty Cycle Minimum Output Oscillation Frequency Soft Start Output Oscillation Frequency Voltage to Current Converters Threshold Dead Time between Low and High Side Conduction 0.2 C f = 470pF; Rfmin = 50k C f = 470pF; Rfmin = 50k; R fstart = 47k 48 58.2 114 50 60 120 52 61.8 126 % kHz kHz 15,11 11 15 High Side Driver Source Current VHVG-VOUT = 0 High Side Driver Sink Current Low Side Driver Source Current Low Side Driver Sink Current VHVG-VBOOT = 0 VLVG-GND = 0 VLVG - VS = 0 170 300 170 300 250 450 250 450 80 40 120 80 mA mA mA mA ns ns
Low/High Side Output Rise Time Cload = 1nF C load = 1nF
2 0.27 0.35
2 s
TIMING SECTION kss 1 Soft Start Timing constant C ss = 330nF 0.115 0.15 0.185 s/F
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L6598
ELECTRICAL CHARACTERISTCS (continued)
Symbol Pin Parameter Test Condition Min. Typ. Max. Unit
SENSE OP AMP lIB Vio Rout IoutIout+ Vic GBW Gdc COMPARATORS Vthe1 Vthe2 tpulse 8 9 8,9 Enabling Comparator Threshold Enabling Comparator Threshold Minimum Pulse lenght 0.56 1.05 0.6 1.2 200 0.64 1.35 V V ns 6,7 5 6, 7 Input Bias Current Input Offset Voltage Output Resistance Source Output Current Sink Output Current OP AMP input common mode range Sense Op Amp Gain Band Width Product DC Open Loop Gain Vout = 4.5V Vout = 0.2V -10 200 1 1 -0.2 1 80 3 0.1 10 300 A mV mA mA V MHz dB
Figure 1. EN2 Timing Diagrams
VS
fOUT
fstart
fmin
EN2
VCss
TSS
TSS
D98IN889
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L6598
Figure 2. EN1 Timing Diagrams
HVG
LVG
EN1
EN2
D98IN890
Figure 3. Oscillator/Output Timing Diagram
Cf
HVG
LVG
D98IN897
High/Low Side driving section
An High and Low Side driving Section provide the proper driving to the external Power MOS or IGBT. An high sink/source driving current (450/250 mA typ) ensure fast switching times also when size4 Power MOS are used. The internal logic ensures a minimum dead time to avoid cross-conduction of the power devices.
Timing and Oscillator Section
The L6598 is provided of a soft start function. It consists in a period of time, TSS, in which the switching frequency shifts from fstart to fmin. This feature is explained in the following description (ref. fig.4 and fig.5).
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L6598
Figure 4. Soft Start and frequency shifting block
Iss
Ifstart
Ifmin
Iosc gm Css OSC
During the soft start time the current ISS charges the capacitor CSS, generating a voltage ramp which is delivered to a transconductance amplifier, as shown in fig. 4. Thus this voltage signal is converted in a growing current which is subtracted to Ifstart. Therefore the current which drives the oscillator to set the frequency during the soft start is equal to:
g I ss ----- I osc = I fmin + ( I fstart - g m V Css ( t )) = I fmin + I fstart - -- m------ t C ss ----- ----- where I fmin = --- ----- , Ifsart = -------- -- , V R EF = 2V [2] R fmin R fstart
At the start-up (t=0) the L6598 oscillates at fstart, set by:
[1]
V R EF
V REF
1 1----- I osc ( 0 ) = I fmin + I fstart = V R EF ------------- + ----- ----- [3] R R fstart fm in
At the end of soft start (t = TSS) the second term of eq.1 decreases to zero and the switching frequency is set only by Imin (i.e. Rfmin):
V REF I osc ( T ss ) = I fm in = ----- --- [4] ----- R fmin
Since the second term of eq.1 is equal to zero, we have:
g m I ss C ss Ifstart ----- -------I fstart - ------------- T SS = 0 T SS = ----- ----- - [5] C ss g m I ss
Note that there is not a fixed threshold of the voltage across CSS in which the soft start finishes (i.e. the end of the frequency shifting), and TSS depends on CSS, Ifstart, gm, and ISS (eq. 5). Making TSS independent of Ifstart, the ISS current has been designed to be a fraction of Ifstart, so:
I fstart C Ifstart C ------------- ----------- T SS = -----ss- T SS - k SS C SS [6] ----I SS = ---- - T SS = -----ss----K g m I fstart K gmK
In this way the soft start time depends only on the capacitor CSS. The typical value of the kSS constant (Soft
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L6598
Start Timing Constant) is 0.15 s/F. The current Iosc is fed to the oscillator as shown in fig. 5. It is twice mirrored (x4 and x8) generating the triangular wave on the oscillator capacitor Cf. Referring to the internal structure of the oscillator (fig.5), a good relationship to compute an approximate value of the oscillator frequency in normal operation is:
1.41 ----f min = ------------- - [7] R fminC f
The degree of approximation depends on the frequency value, but it remains very good in the range from 30kHz to 100kHz (figg.6-10)
Figure 5. Oscillator Block
Iosc
X4
Vth+
+
S Cf R
Vth-
+
X8
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L6598
Figure 6. Typ. fmin vs. Rfmin @ Cf = 470pF
fmin (KHz)
D98IN891
Figure 9. Typ. (fstart-fmin) vs. Rfstar @ Cf = 470pF
f (KHz) 100
D98IN894
100
Rfmin=100K
80
80
60
60
40
40
20 20 40 60 80 100 Rfmin(K)
20 20 40 60 80 100 Rfstart(K)
Figure 7. Typ. (fstart-fmin) vs. Rfstar @ Cf = 470pF
f (KHz)
D98IN892
Figure 10. fmin @ different Rf vs Cf
fmin (KHz)
Rf=19.9Kohm - calc.
80
400
Rfmin=33K
Rf=19.9Kohm - meas.
60
200 Rf=90Kohm - meas.
40
Rf=90Kohm - calc.
20 20 40 60 80 100 Rfstart(K)
0 0 200 400 Cf (pF)
Figure 8. Typ. (fstart-fmin) vs. Rfstar @ Cf = 470pF
f (KHz) 100
Rfmin=50K
D98IN893
80
60
40
20 20 40 60 80 100 Rfstart(K)
9/16
L6598
Bootstrap Section
The supply of the high voltage section is obtained by means of a bootstrap circuitry. This solution normally requires an high voltage fast recovery diode for charging the bootstrap capacitor (fig. 11a). In the L6568 a patented integrated structure, replaces this external diode. It is realised by means of a high voltage DMOS, driven synchronously with the low side driver (LVG), with in series a diode, as shown in fig. 11b.
Figure 11. ootstrap driver
DBOOT
VS VS VBOOT
VBOOT
CBOOT CBOOT
VOUT
LVG
VOUT
a
b
To drive the synchronised DMOS it is necessary a voltage higher than the supply voltage Vs. This voltage is obtained by means of an internal charge pump (fig. 11b). The diode connected in series to the DMOS has been added to avoid undesirable turn on of it. The introduction of the diode prevents any current can flow from the Vboot pin to the VS one in case that the supply is quickly turned off when the internal capacitor of the pump is not fully discharged. The bootstrap driver introduces a voltage drop during the recharging of the capacitor Cboot (i.e. when the low side driver is on), which increases with the frequency and with the size of the external power MOS. It is the sum of the drop across the RDSON and of the diode threshold voltage. At low frequency this drop is very small and can be neglected. Anyway increasing the frequency it must be taken in to account. In fact the drop, reducing the amplitude of the driving signal, can significantly increase the RDSON of the external power MOS (and so the dissipation). To be considered that in resonant power supplies the current which flows in the power MOS decreases increasing the switching frequency and generally the increases of RDSON is not a problem because power dissipation is negligible. The following equation is useful to compute the drop on the bootstrap driver:
Q ----- g-----R dson + V diode [8] V drop = I ch arg e R dson + V diode V drop = ---- ----T ch arg e
where Qg is the gate charge of the external power MOS, Rdson is the on resistance of the bootstrap DMOS, and Tcharge is the time in which the bootstrap driver remains on (about the semiperiod of the switching frequency minus the dead time). The typical resistance value of the bootstrap DMOS is 150 Ohm. For example using a power MOS with a total gate charge of 30nC the drop on the bootstrap driver is about 3V, at a switching frequency of 200kHz. In fact:
30nC ----V drop = ----- -------- 150 + 0.6V~2.6V 2.23s
To summarise, if a significant drop on the bootstrap driver (at high switching frequency when large power MOS are used) represents a problem, an external diode can be used, avoiding the drop on the RDSON of the DMOS.
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L6598
OP AMP Section
The integrated OP AMP is designed to offer Low Output Impedance, wide band, High input Impedance and wide Common Mode Range. It can be readily used to implement protection features or a closed loop control. For this purpose the OP AMP Output can be properly connected to Rfmin pin to adjust the oscillation frequency.
Comparators
Two CMOS comparators are available to perform protection schemes. Short pulses (>= 200ns) on Comparators Input are recognised. The EN1 input (active High), has a threshold of 0.6V (typical value) forces the L6598 in a latched shut down state (e.g. LVG Low, HVG low, Oscillator stopped), as in the Under Voltage Conditions. Normal Operating conditions are resumed after a power-off power-on sequence. The EN2 input (active high), with a threshold of 1.2V (typical value) restarts a Soft Start sequence (see Timing Diagrams). In addition the EN2 Comparator, when activated, removes a latched shutdown caused by EN1.
Figure 12. Switching Time Waveform Definitions
90% 90%
HVG
10% tr tf
10%
90%
90%
LVG
10% tr tf
10%
D98IN898
Figure 13. Dead Time and Duty Cycle Waveform Definition
T1 td td Dc = T1 Tperiod
50% HVG
50%
50% LVG
50%
50%
Tperiod
D98IN899
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L6598
Figure 14. Typ. fmin vs. Temperature
fmin (KHz)
D98IN895
Figure 17. Start Up Current vs Temperature
Isu (A)
70
200
60
150
50
100
40 -50 0 50 100 T(C)
50 -50 0 50 100 T (C)
Figure 15. Typ. fstart vs. Temperature
ffstart (KHz)
D98IN896
Figure 18. Quiescent Current vs Temperature
Iq (mA) 2.3
130
2.1
Iq @ Vclamp
120
1.9
Iq @ 12V
110
1.7
100 -50 0 50 100 T(C)
1.5 -50 0 50 100 T (C)
Figure 16. Vs thresholds and clamp vs temp.
Vs (V) Vclamp 14
Figure 19. HVG Source and Sink Current vs. Temperature
Ihvg (mA)
500
12 400 Vsuvp 300 Ihvg sink curr.
10
8 Vsuvn 6 -50 0 50 100 T (C) 100 -50 0 50 200
Ihvg source curr.
100
T (C)
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L6598
Figure 20. LVG Source and Sink Current vs. Temperature
Ilvg (mA)
Figure 21. Soft Start Timing Constant vs. Temperature
kss (s/F)
500
400 Ilvg sink curr. 300
0.16
0.14 200 Ilvg source curr.
100 -50 0 50 100 T (C)
0.12 -50
0
50
100
T (C)
Figure 22. Wide Range AC/DC Adapter Application
85 to 270 Vac
L6561
Vo
L6598
DRIVER VCO & CONTROL TL431
ENABLE
D98IN874A
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L6598
DIM. MIN. a1 B b b1 D E e e3 F I L Z 0.51 0.77
mm TYP. MAX. MIN. 0.020 1.65 0.5 0.25 20 8.5 2.54 17.78 7.1 5.1 3.3 1.27 0.030
inch TYP. MAX.
OUTLINE AND MECHANICAL DATA
0.065 0.020 0.010 0.787 0.335 0.100 0.700 0.280 0.201 0.130 0.050
DIP16
14/16
L6598
DIM. MIN. A a1 a2 b b1 C c1 D (1) E e e3 F (1) G L M S 3.8 4.6 0.4 9.8 5.8 0.35 0.19 0.1
mm TYP. MAX. 1.75 0.25 1.6 0.46 0.25 0.5 45 (typ.) 10 6.2 1.27 8.89 4 5.3 1.27 0.62 8(max.) 0.150 0.181 0.016 0.386 0.228 0.014 0.007 0.004 MIN.
inch TYP. MAX. 0.069 0.009 0.063 0.018 0.010 0.020
OUTLINE AND MECHANICAL DATA
0.394 0.244 0.050 0.350 0.157 0.209 0.050 0.024
SO16 Narrow
(1) D and F do not include mold flash or protrusions. Mold flash or potrusions shall not exceed 0.15mm (.006inch).
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L6598
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. N o license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (R) 2000 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http:/ /www.st.com
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